Chiplets and Advanced Packaging for Future Computing
Terry Wu
Samsung Electronics
Symposium VII: Packaging and Assembly
Symposium VII: Packaging and Assembly
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Challenges of Semiconductor Micro Via Fabrication Technology for 3D Chiplet Interconnect
Yasuhiro Morikawa
ULVAC, Inc
Comprehensive Investigation of Insufficient IMC in SOIC Through Advanced Statistical Analysis
Jingwei Sun
NXP Semiconductors
Hybrid Wafer-to-Wafer and Die-to-Wafer Technology for Heterogenous Integration Applications
Viorel Dragoi
EV Group
Glass As An Enabling Material for Advanced Packaging
Jay Zhang
Corning Incorporated
Study on ELK Dielectric Reliability During the Solder Reflow Process Based on Finite Element Simulations
Jialin Zheng
Sanechips Technology Co., Ltd.
A Modularized Thermal Test Chip Design and Verification
Jianjun Sun
Sanechips Technology Co., Ltd.
Evaluating 224G SI Performance of Vertical Interconnections on Package Substrate and PCB
Kai Yuan
Sanechips Technology Co., Ltd
Heat Transfer Improvement of Phase Change Material with Metal Foam
Yan Zhang
Shanghai University
Study of Defects in Advanced Packing at the Atomistic Scale by Using In Situ TEM
Xing Wu
East China Normal University
The Solution and Challenge of Glass Core Substrate Technology
Tingyu Lin
Guangdong FoZhiXin (FZX) Microelectronics Technology Research Co., Ltd.
Breaking Memory Wall with SeDRAM® Technology in Chip Level
Fengguo Zuo
Xi'an UniIC Semiconductors Co., Ltd.
