Open Source Chip: Achievement and Challenges
Yungang Bao
Institute of Computing Technology , Chinese Academy of Sciences
Symposium IX: Design and Automation of Circuits and Systems
Symposium IX: Design and Automation of Circuits and Systems
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How 3D-IC speed-up High Memory Bandwidth AI Chip
Brian Li
Cadence Design Systems
From Placement to Routing: Machine Learning Solutions for Design Rule Violation Forecasting
Yu-Guang Chen
National Central University
Precision Analysis and Hardware Acceleration for Large Scale Quantum Fourier Transformation on Modern FPGAs
He Li
Southeast University
Custom Design of CXL Controller on Intel FPGA R-Tile
ChunZhang Chen
Peng Cheng Lab
Verification of PCIe over Electronic and Photonic I/Fs
Chun-Zhang Chen
Peng Cheng Lab
AI Empowered Radio-Frequency Power Amplifier Design and Modelling
Jiangguo Ma
Zhejiang University, Zhongyuan University of Technology
LLM Enhancement for Secure RTL Generation
Yier Jin
University of Science and Technology of China
Analytical Differentiable Optimization for EDA in the AI Era
Rongjian Liang
NVIDIA, USA
On Automated Generation of Adversarial Camouflage Against Autonomous Driving
Yu Li
Zhejiang University
Enhancing Alliance VLSI Toolchain by Mixed Gate-level Logic Synthesis
Zhufei Chu
Ningbo University
Accelerating the Physical Design of Large FPGAs Through Divide-And-Conquer Methodology
Wanzheng Weng
ShanghaiTech University
A Dynamic Congestion-Aware Analytic Initial Routing Flow for VLSI Designs
Lang Feng
Sun Yat-sen University
Dynamic Noise Sensitivity Based Critical Path Selection
Siyu Yun
Zhejiang University
Genetic Algorithm as a Design Tool for Freeform MEMS Device
Chen Wang
Tsinghua University
Transforming AI: The Impact of Computing-in-Memory on Future Technologies
Tony Tae-Hyoung Kim
Nanyang Technological University
Emerging Trends and Advances in Computing-In-Memory: A Software-Hardware Co-Design Perspective
Yingjie Qi
Beihang University
Hop-CIM: An All-Digital Two-level Approximate SRAM-CIM Macro for High Energy-Efficient HNN Acceleration with Data-Aware Early Exit Mechanism
Yanan Sun
Shanghai Jiao Tong University
A Temperature and Process Robust Logarithmic Circuit for CIM Application
Ruizhe Sun
Zhejiang University
Cryptographic Failures by Processor Vulnerability
Yongqiang Lyu
Tsinghua University
Neural Rendering Hardware for Next Generation Graphics
Xin Lou
ShanghaiTech University
ANAS: Approximate Neural Architecture Search via Reinforcement Learning
Zheyu Yan
Zhejiang University
Automatic Partition for Hybrid Stochastic-Binary-Based Circuits
Zexi Li
Shanghai Jiao Tong University
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CIRCUIT DESIGN AND SNEAK PATH CURRENT ANALYSIS OF 28NM 1T4R RRAM MEMORY IP
Jianshi Tang
Tsinghua University
A Low-Power Passive BLE Wake-up Receiver with Single Sideband(SSB) Backscatter System
Yunhan Gan
Southeast University
Design of a Line Driver for High-Speed Power Line Communication Applications
Shunxin Xu
Zhejiang University
Circuit Model and Wordline Driver Targeting for Wordline Open Effect in 3D DRAM
Zhixian Pan
Beijing Superstring Academy of Memory Technology
A Temperature Compensating Dynamic Biasing Circuit for A K-Band Driving Amplifier
Hangbiao Li
Southwest China Institute of Electronics Technology
The Design of a Sub-Nanoampere (nA) Level Low-Offset Rail-To-Rail Unity-Gain Op-Amp
Zhifei Feng
Zhejiang University
Accelerated simulation of electromigration based on equivalent circuit
Hengyi Zhu
Shanghai Jiao Tong University
Chiplet DFT Solutions for Cross-Die Testing Channels
Zhiyu Li
Sanechips Technology Co., Ltd
A 60GHZ Four-Stage Cascaded LNA for 802.11AD Protocol with 22.3DB Gain and 3.45 Noise Figure
Yi Yao
Tsinghua University