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Symposium IV: Thin Film, Plating and Process Integration

Symposium IV: Thin Film, Plating and Process Integration

Virtual Conference Registration
  • Conference Agenda
  • CSTIC 2025 Call for Papers

Opening Remarks

  • Oral Session

  • Poster Session

  • Tailoring the deposition and composition of advanced oxide and SiCN films to deliver the highest bonding energy for fusion and hybrid bonding applications

    Zongbin Wang

    Applied Materials

    A Review in III-Nitride Nanocolumns Growth and Applications

    Enrique Calleja

    Universidad Politécnica de Madrid

    Advances and Reliability Challenges in Heterogeneous Integration in Chiplet Era: from Solder to Copper to Optical Interconnects

    Zhuo-Jie Wu

    HFC Semiconductor

    Optimization of Deep Trench Isolation on 0.18μm SOI BCD Technology for Automotive Application

    Siti Aisah Mohd Salleh

    X-FAB Sarawak Sdn. Bhd.

    The Progress and Challenges of Large Scale Integration of Silicon Photonics

    Adam Lewis

    CUMEC

    Do we need 300mm GaN-on-Si?

    Kai Cheng

    Enkris Semiconductor,Inc

    Si based GaN HEMTs/System R&D and the perspective of the technological commercialization

    Hongyu Yu

    Southen University of Science & Technology

    Thin Film Atomic Layer Deposition and Selective Processes

    Rong Chen

    Huazhong University of Science and Technology

    A Chemistry Perspective of ALD Precursors' Properties

    Xiabing Lou

    Origin Deposition Materials Co., Ltd.

    CHARACTERIZATION OF ALD LOW-K FILMS

    Wenxu Duan

    Beijing NAURA Microelectronics Equipment Co., Ltd.

    ALD of Dielectric Materials: Analysis of Equipment Design and Process Performance Using Detailed Modeling

    Yanlin Mao

    Suzhou STR Software Technology Co., Ltd.

    Design Technology Co-optimization for Yield and Reliabulity Enhancement of RRAM Technology Platform

    Zhichao Lv

    Reliance Memory

    The effect of stress on HfO2-based ferroelectric thin films

    Feng Luo

    Nankai University

    SiGe/Si Heteroepitaxial Epitaxy and Characterization for CMOS and Vertically Stacked DRAM

    Guilei Wang

    Beijing Superstring Academy of Memory Technology

    Modeling of Endurance Degradation of Anti-ferroelectric Hf1-xZrxO2 Capacitor

    Yaru Ding

    Zhejiang University

    The Formation of Air-gaps Isolation Used in Metal/Dielectric Stacking

    Weidu Qin

    Beijing Superstring Academy of Memory Technology

    SMT OPTIMIZATION OF PMOSFET BASED ON MULTI-DEPOSITION AND IN-SITU N2 PLASMA TREATMENT

    Longyue Zheng

    Zhejiang University

    FEA of Thermo-mechanically Induced Crack in IMD

    Colin Chan

    X-FAB Sarawak Sdn. Bhd.

    Backside Deposition of LTO/Poly-Si Sealing Layer by One-step PECVD and Post Annealing

    Junxian Gao

    Lam Research

    Copper Diffusion Improvement by Optimizing TaN and Integration in Power Device

    Xiangyu Zhou

    Beijing NAURA Microelectronics Equipment Co., Ltd.

    A machine learning study to obtain an optimal processing pulsed frequency on reactive pulsed DC sputtering of aluminum nitride films

    Xue-Li Tseng

    National Central University

    Full Wafer Combinatorial Deposition with In-situ XPS/UPS Characterizations

    Weimin Li

    Shanghai Institute of IC Materials Co., Ltd.

    Tungsten Surface Roughness Improvement by Single Deposition Process

    Zhengning Gao

    Lam Research

    The Effects of Different Silicon Oxide Substrates on Amorphous Silicon Thin-Film

    Zhengdao Liu

    Beijing NAURA Microelectronics Equipment Co., Ltd.

    Potential confusion in the analysis of the current-voltage characteristics of high-k dielectric on lightly doped p-type silicon MIS capacitors

    Wai Shing Lau

    Nanyang Technological University

    The secret of the leakage current mechanism in some historical device-quality high-k metal-insulator-metal capacitors

    Wai Shing Lau

    Nanyang Technological University

  • Study of HDPCVD Charge Improvement for ILD Process

    Jie Yang

    Lam Research

    SiGe Epitaxy Improved by Si Cap Technology

    Tao Wang

    Shanghai Huali Integrated Circuit Corporation

    IMPROVED PERFORMANCE OF PMOS BY OPTIMIZING THE EPITAXIAL MORPHOLOGY

    Tao Wang

    Shanghai Huali Integrated Circuit Corporation

    Exploring the Effect of Gate Oxide Process on Electrical Performance of CMOS Device

    Yongkang Hu

    University of Science and Technology of China

    Improving Gate Oxide Uniformity Using Wet-Dry Oxidation

    Lin Tang

    Zhejiang University

    NiSix Anneal on Producer Pyra

    Heping Du

    Applied Materials

    W CVD Process Extendibility Development for Challenging Gap Fill

    Shao Rui

    Applied Materials

    NBTI Improvement Through Gate Process Optimization

    Ying Ma

    Applied Material China

    Excellent Performance of PC XT in Soft-Clean

    Xingluan Long

    Applied Materials

    Amorphous Silicon Bump Defect Mechanism Analysis and Improvement Strategy

    Shudi Min

    Applied Materials

    Approach of Customized Thickness Profile and Superior Uniformity on SACVD

    Xiang Li

    Applied Materials

    HARP STI Wafer Sliding and Pre-heat Improvement by Recipe Optimization

    Yiyu Zhang

    Applied Materials

    HARP STI Range Improvement for 28nm HKMG Double Patterning Process

    Zhaojie Sun

    Applied Materials

    High Bow wafer Handling Approach on Producer PECVD

    Bin Wang

    Applied Materials

    Low Dep Rate Oxide Process Development for Glue Layer

    Congcong Zhao

    Applied materials

    Excellent Stability Control for High Throughput DARC Process

    Chao Zheng

    Applied Materials

    N-Dosage Non-Uniformity Tuning in Nitride Incorporated Gate Oxide Process

    Eira Yang

    Applied Materials

    High Productivity of Advanced Al PVD in Al Slab

    Xiaogang Su

    Applied Materials

    Tool transfer compatibility improvement for different thin wafer type

    Jiaxi Liu

    Applied Materials

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